How PCI Express 6.0 Doubles Bandwidth With PAM4 Modulation
The sixth-generation interconnect standard doubles motherboard data transfer speeds to meet the demands of accelerator computing clusters.
Demand for interconnect bandwidth between processors, memory, and graphics accelerators is growing exponentially as AI computing models get larger. PCI Express 6.0 answers that challenge by doubling PCIe 5.0's speed to 64 GT/s.
The key to that speed increase is the adoption of PAM4 (Pulse Amplitude Modulation 4-level), which replaces the traditional NRZ signaling scheme. PAM4 transmits two bits of data per clock cycle using four distinct voltage levels.
Because PAM4 signals are more sensitive to electromagnetic noise, the new specification integrates a forward error correction (FEC) mechanism with ultra-low latency under 2 nanoseconds.
The interconnect standard will be the backbone of future data center servers as they work around memory transfer bottlenecks.
Andi Pratama
Contributing EditorSpesialis keamanan siber, ethical hacker, dan analis kerentanan infrastruktur jaringan industri.
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